1. Field of the Invention
This invention relates generally to semiconductor fabrication technology, and, more particularly, to a method for semiconductor fabrication supervision and optimization.
2. Description of the Related Art
There is a constant drive within the semiconductor industry to increase the quality, reliability and throughput of integrated circuit devices, e.g., microprocessors, memory devices, and the like. This drive is fueled by consumer demands for higher quality computers and electronic devices that operate more reliably. These demands have resulted in a continual improvement in the manufacture of semiconductor devices, e.g., transistors, as well as in the manufacture of integrated circuit devices incorporating such transistors. Additionally, reducing defects in the manufacture of the components of a typical transistor also lowers the overall cost per transistor as well as the cost of integrated circuit devices incorporating such transistors.
The technologies underlying semiconductor processing tools have attracted increased attention over the last several years, resulting in substantial refinements. However, despite the advances made in this area, many of the processing tools that are currently commercially available suffer certain deficiencies. In particular, such tools often lack advanced process data monitoring capabilities, such as the ability to provide historical parametric data in a user-friendly format, as well as event logging, real-time graphical display of both current processing parameters and the processing parameters of the entire run, and remote, i.e., local site and worldwide, monitoring. These deficiencies can engender nonoptimal control of critical processing parameters, such as throughput accuracy, stability and repeatability, processing temperatures, mechanical tool parameters, and the like. This variability manifests itself as within-run disparities, run-to-run disparities and tool-to-tool disparities that can propagate into deviations in product quality and performance, whereas an ideal monitoring and diagnostics system for such tools would provide a means of monitoring this variability, as well as providing means for optimizing control of critical parameters.
Among the parameters it would be useful to monitor and control are process parameters related to chemical mechanical planarization (CMP). Examples of such process parameters include the deposition pattern and/or profile, whether center thick or center thin, and/or the magnitude of the xe2x80x9cdelta thickness,xe2x80x9d which measures the difference between the thickness of a process layer at the center of the workpiece and the thickness of a process layer at the edge of the workpiece. For example, if the polishing profile is edge-fast, then more material needs to be at the edge of the workpiece than at the center. Otherwise, the edge of the workpiece may be overpolished in an edge-fast polishing process, requiring costly and expensive reworking of the workpiece through the polishing processing. This may cause differences in wafer processing between successive runs or batches or lots of wafers, leading to decreased satisfactory wafer throughput, decreased reliability, decreased precision and decreased accuracy in the semiconductor manufacturing process.
However, traditional statistical process control (SPC) techniques are often inadequate to control precisely process parameters related to chemical mechanical planarization (CMP) in semiconductor and microelectronic device manufacturing so as to optimize device performance and yield. Typically, statistical process control (SPC) techniques set a target value, and a spread about the target value, for the process parameters related to chemical mechanical planarization (CMP). The statistical process control (SPC) techniques then attempt to minimize the deviation from the target value without automatically adjusting and adapting the respective target values to optimize the semiconductor device performance, and/or to optimize the semiconductor device yield and throughput. Furthermore, blindly minimizing non-adaptive processing spreads about target values may not increase processing yield and throughput.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
In one aspect of the present invention, a method is provided that comprises forming a copper seed layer on a workpiece and measuring the uniformity of the copper seed layer on the workpiece. The method also comprises applying the uniformity measurement to modify processing to form a copper layer having a desired uniformity profile for increased planarization in subsequent planarizing.
In another aspect of the present invention, a computer-readable, program storage device is provided, encoded with instructions that, when executed by a computer, perform a method that comprises forming a copper seed layer on a workpiece and measuring the uniformity of the copper seed layer on the workpiece. The method also comprises applying the uniformity measurement to modify processing to form a copper layer having a desired uniformity profile for increased planarization in subsequent planarizing.
In yet another aspect of the present invention, a computer programmed to perform a method is provided, the method comprising forming a copper seed layer on a workpiece and measuring the uniformity of the copper seed layer on the workpiece. The method also comprises applying the uniformity measurement to modify processing to form a copper layer having a desired uniformity profile for increased planarization in subsequent planarizing.
In another aspect of the present invention, a system is provided that comprises a tool for forming a copper seed layer on a workpiece and a tool for measuring the uniformity of the copper seed layer on the workpiece. The system also comprises a controller for applying the uniformity measurement to modify processing to form a copper layer having a desired uniformity profile for increased planarization in subsequent planarizing.
In yet another aspect of the present invention, a device is provided that comprises means for forming a copper seed layer on a workpiece and means for measuring the uniformity of the copper seed layer on the workpiece. The device also comprises means for applying the uniformity measurement to modify processing to form a copper layer having a desired uniformity profile for increased planarization in subsequent planarizing.